In a semiconductor device having a quantum well structure, a transistor or the like, electrodes are arranged to inject a current into the semiconductor material and make an electric contact with the outside. Normally, in order to inject a current into a semiconductor microstructure, a scheme has been employed in which the electrode on the microstructure is extended to provide a wider electrode region and a metal wire is connected to the electrode region. For example, a wide electrode region for facilitating bonding of a metal wire or the like is secured by embedding a portion other than the current injection region in an insulating resin or a dielectric or a semiconductor layer of a conductive type different from that of the current injection region and extending an electrode from the current injection region to the embedment region. Moreover, since the current injection region is often formed by processing a semiconductor layer into a mesa shape, the embedment region also plays the role of canceling a difference in level, or surface unevenness, due to the mesa, thus facilitating the extension of the electrode.
As a prior art semiconductor device, there is, for example, a semiconductor laser device that emits laser light from its light-emitting layer. The semiconductor laser device (not shown) generally has a so-called buried ridge structure. More in detail, in the semiconductor laser device, its active layer is held between a lower cladding layer and an upper cladding layer. Then, a ridge stripe portion is formed on the upper cladding layer to inject a current into a stripe-shaped region of the active layer, and a current constriction layer is formed on both sides of the ridge stripe portion.
The buried ridge structure is fabricated as follows.
First, layers such as the lower cladding layer, the active layer, the upper cladding layer are formed on a substrate by carrying out a first semiconductor crystal growth process, and thereafter, the ridge-shaped stripe portion is formed by etching part of the semiconductor layer on the substrate.
Then, the current constriction layer is formed on both sides of the stripe portion by carrying out a second semiconductor crystal growth process.
Further, a contact layer is formed on both the stripe portion and the current constriction layer by carrying out a third semiconductor crystal growth process, so that the contact layer securely provides a wide region in which the electrode is to be formed.
As is apparent from the above, the buried ridge structure has a problem that the semiconductor crystal growth step needs to be carried out three times in total, and it is very difficult to achieve cost reduction.
A so-called air ridge structure, which solves the problem, is disclosed in JP 2000-114660 A. The air ridge structure is a structure capable of constricting the current by means of an insulator or the like and needs only one semiconductor crystal growth step.
A semiconductor laser device having the air ridge structure is fabricated as follows.
First, as shown in FIG. 13, an n-AlGaAs lower cladding layer 502, an i-AlGaAs lower light-confining layer 503, a quantum well active layer 504 including an InGaAs quantum well layer and a GaAsP quantum well layer, an i-AlGaAs upper light-confining layer 505, an AlGaAs layer for forming a p-AlGaAs upper cladding layer 506, and a GaAs layer for forming a p-GaAs contact layer 507 are successively formed on an n-GaAs substrate (wafer) 501 by the metal-organic chemical vapor deposition (MOCVD) method.
Then, by partially etching the AlGaAs layer for forming the p-AlGaAs upper cladding layer 506 and the GaAs layer for forming the p-GaAs contact layer 507 through a normal photolithography step and an etching step, a ridge-shaped stripe portion 511 is formed.
Next, the entire surface of the wafer is coated with SiNX, and only the SiNX on the contact layer 507 is removed, forming an insulating overcoat 508 made of SiNX. After the upper surface of the contact layer 507 is exposed, a p-side electrode 509 is formed on the contact layer 507 and the insulating overcoat 508.
Next, an n-side electrode 510 is attached to the back surface (namely, a surface opposite from the surface on which the semiconductor layers are formed) of the n-GaAs substrate 501.
Next, the entire wafer is cleaved to a resonator length, and a low reflection coating and a high reflection coating (not shown) are deposited respectively on the two exposed cleavage surfaces, completing the semiconductor laser device.
In the semiconductor device, since the stripe portion 511 has a minute width of about several micrometers, it is impossible to bond a metal wire used for current injection directly to only the upper surface of the stripe portion 511. Therefore, the upper surface of the con act layer 507 is exposed from the insulating overcoat 508, and the p-side electrode 509 is formed on the contact layer 507 and the insulating overcoat 508. It is noted that a region in which a metal wire (not shown) is to be bonded is secured on the insulating overcoat 508 to which the p-side electrode 509 is led from the stripe portion 511.
Moreover, as another prior art semiconductor device, there is a GaAs based heterojunction bipolar transistor disclosed in JP 2003-100767 A.
The GaAs based heterojunction bipolar transistor is fabricated as follows.
First, as shown in FIG. 14, an n+-type GaAs subcollector layer 602, a GaAs layer for forming an n-type GaAs collector layer 603, a GaAs layer for forming a p type GaAs base layer 604, an AlGaAs layer for forming an n-type AlGaAs emitter layer 605, a GaAs layer for forming an n+-type GaAs first emitter contact layer 606 and an InGaAs layer for forming an n+-type InGaAs second emitter contact layer 607 are epitaxially grown successively on a semi-insulating GaAs substrate 601 by the MOCVD method.
Next, surfaces of the p+-type GaAs base layer 604 and the n+-type GaAs subcollector layer 602 are exposed by carrying out the well-known photolithography step and etching step.
Next, an emitter ohmic contact electrode 613 made of WNX, a base ohmic contact electrode 612 made of Pt/Ti/Pt/Au, and a collector ohmic contact electrode 611 made of AuGe/Ni/Au are formed on the n+-type InGaAs second emitter contact layer 607, the p+-type GaAs base layer 604, and the n+-type GaAs subcollector layer 602, respectively, by sputtering and a vapor deposition method. Subsequently, an alloying step is carried out to obtain an ohmic connection between the p+-type GaAs base layer 604 and the n-type GaAs collector layer 603.
Next, an intermediate metal film 615 made of Ti/Pt/Au is formed on the base ohmic contact electrode 612, and an intermediate metal film 616 made of Ti/Pt/Au is formed on the emitter ohmic contact electrode 613.
Next, in order to cancel steps, or unevenness, formed of the n+-type GaAs subcollector layer 602, the n-type GaAs collector layer 603, the p+-type GaAs base layer 604, the n-type AlGaAs emitter layer 605, the n+-type GaAs first emitter contact layer 606 and the n+-type InGaAs second emitter contact layer 607, a thermosetting resin 620 is placed. A photosensitive polyimide is used as a material of the thermosetting resin 620.
A method of placing the thermosetting resin 620 will be described in concrete below. A polyimide precursor diluted with a solvent is applied onto the GaAs substrate 601 by a spin coating method, and the polyimide precursor is formed into a desired pattern by subjecting the polyimide precursor to exposure to light and development. Then, heat treatment is performed to make the polyimide precursor a polyimide to thereby obtain the thermosetting resin 620. The thermosetting resin 620 is designed to avoid its overlapping with a region where the collector ohmic contact electrode 611 is formed as much as possible.
Next, an intermediate metal film 621 made of Ti/Pt/Au is formed on the collector ohmic contact electrode 611, and wiring metal electrodes 618 and 619 to the respective ohmic connection electrodes are subsequently formed, completing the heterojunction bipolar transistor.
In the heterojunction bipolar transistor, the wiring metal electrode 618 led from the intermediate metal film 616 on the emitter ohmic contact electrode 613 and the wiring metal electrode 619 led from the intermediate metal film 615 on the base ohmic contact electrode 612 are led from an upper part of the mesa-shaped semiconductor portion. Therefore, in order to prevent the breaking of the wires due to the steps of the semiconductor layers, the wires are formed on the thermosetting resin 620 in which the steps of the semiconductor layers are embedded.
Generally, in such a heterojunction bipolar transistor, the mesa-shaped semiconductor portion has a rectangular shape when viewed from above in order to reduce the base-emitter junction area and reduce the base resistance, and the mesa side surface parallel to the lengthwise direction of the rectangular shape has an inverted taper shape as shown in FIG. 14. Further, in order to reduce the cost of the bipolar transistor, the chip area of the transistor needs to be reduced and the electrodes must be extended as if they stride over the mesa side surfaces when led from the upper part of the mesa-shaped semiconductor portion. From this point of view as well, the embedment with a thermosetting resin is important.
However, breaking, or discontinuity, induced by a step (referred to as “step-induced breaking” or “step-induced discontinuity”) tends to occur in the deposited insulating overcoat and the p-electrode of the semiconductor laser device of FIG. 13, and this disadvantageously makes the fabrication of the semiconductor laser device difficult and thus lowers the yield.
Moreover, the transistor of FIG. 14 needs a process for forming an insulating substance such as a resin on the sides of the mesa-shaped semiconductor layers in order to draw the electrode from the upper part of the mesa-shaped semiconductor portion without causing the step-induced breaking, and this therefore causes a problem of an increased number of manufacturing process steps, a reduction in the yield, an increase in the cost, and so on.